The 37h International Symposium on Power Semiconductor Devices and ICs

Date: June 1-5, 2025 _ Venue: Kumamoto-Jo Hall, Kumamoto, Japan
KUMAMON

kumamoto image ISPSD2025

SHORT COURSE

SHORT COURSE PROGRAM

Date: June 1 (Sunday) 8:30-16:30
Short Course Chair: Dr. Tatsuya Nishiwaki, Toshiba Electronic Devices & Storage, Japan

200mm SiC Substrate development and 300mm SiC opportunities & challenges

Dr. Chao Gao, SICC, China

Technology for p-GaN gate High-voltage Gallium Nitride Transistors

Mr. Yasuhiro Uemoto, Infineon Technologies, Japan

Overview of Silicon Power Devices: History, Trends and Outlook

Prof. Wataru Saito, Kyushu University, Japan

Recent Requirements and Trends on Power IC Technology

Dr. Sang Gi Lee, DB Hitek, Korea

Chip Embedded Power Package Technologies for AI and Vehicles

Mr. Yoshiaki Aizawa, AOI ELECTRONICS, Japan

Design Automation Technologies (provisional title)

Dr. Tristan Evans, PE-Systems, Germany

AI-assisted Reliability Testing, Modeling, and Condition Monitoring for Power Semiconductor Modules

Prof. Huai Wang, Aalborg University, Denmark

IMPORTANT DATES

Submission deadline: February 14, 2025
Author Notification: March 24, 2025
Registration starts: January 2025
February 2025

Organizer

The Institute of Electrical Engineers of Japan

Secretariat

ISPSD 2025 Secretariat
c/o Convention Linkage, Inc.
2-17 Sakuramachi, Chuo-ku, Kumamoto City 860-0805, JAPAN
Phone: +81-96-288-0882
Fax: +81-96-288-0883
Email: ISPSD2025@c-linkage.co.jp