The 37h International Symposium on Power Semiconductor Devices and ICs

Date: June 1-5, 2025 _ Venue: Kumamoto-Jo Hall, Kumamoto, Japan
KUMAMON

kumamoto image ISPSD2025

SCHEDULE

  • This is a tentative schedule. Final version will be released after Author Notification.
  • There will be an Industrial Session after the Short Course.
JST June 1st (Sun.) June 2nd (Mon.) June 3rd (Tue.) June 4th (Wed.) June 5th (Thu.)
8:00 Civic Hall (2F) Main Hall (4F) Main Hall (4F) Main Hall (4F) Main Hall (4F)
Short Course Opening Opening
Short Course 1 Oral 4 Oral 7 Oral 10
9:00 Plenary
10:00
Break Break Break Break Break
Short Course 2 Oral 1 Oral 5 Oral 8 Oral 11
11:00
12:00
Lunch (Civic Hall)
13:00
14:00 Short Course 3 Oral 2 Oral 6 Oral 9 Oral 12
15:00
Break Break Break Closing
16:00
Oral 3 Poster 1
(3F)
Poster 2
(3F)
Break
17:00 Industrial
Session
(Civic Hall with Light Refreshment)
18:00 Welcome Reception
(Civic Hall)
AdCom Dinner
(Invitation Only)
TPC Dinner
(Invitation Only)
  Banquet
(Hotel Nikko Kumamoto)
 

IMPORTANT DATES

Submission deadline: February 14, 2025
Author Notification: March 24, 2025
Registration starts: January 2025
February 2025

Organizer

The Institute of Electrical Engineers of Japan

Secretariat

ISPSD 2025 Secretariat
c/o Convention Linkage, Inc.
2-17 Sakuramachi, Chuo-ku, Kumamoto City 860-0805, JAPAN
Phone: +81-96-288-0882
Fax: +81-96-288-0883
Email: ISPSD2025@c-linkage.co.jp